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Apr 25, 2024
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EE 6673 - Interconection Networks for High-Performance Computing Systems
Study of interconnection networks for high-performance computing (HPC) systems and multi-cores at on-chip, inter-chip and inter-rack levels.
Requisites: EE 5683
Credit Hours: 3
Repeat/Retake Information: May not be retaken.
Lecture/Lab Hours: 3.0 lecture
Grades: Eligible Grades: A-F,WP,WF,WN,FN,AU,I
Learning Outcomes:
- Ability to differentiate between various switching and routing techniques.
- Ability to evaluate future technologies for implementing the interconnection network.
- Ability to understand techniques for designing various network/interconnect topologies.
- Ability to understand the working of interconnection networks at on-chip and off-chip levels.
- Ability to understand the working of the router microarchitecture.
- Ability to understand various flow control techniques implemented by interconnection networks.
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