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Apr 24, 2024
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EE 6173 - Fault Testable Design
Basic concepts of reliability. Physical faults and testing. Test generation for combinational and sequential logic circuits, random testing, and signature analysis. Fault tolerance and circuit redundancy, self testing and fail-safe design, fault tolerant VLSI design, practical fault tolerant systems. Self testing, design for testability, built-in test, boundary scan testing, IEEE standards.
Requisites: EE 5143
Credit Hours: 3
Repeat/Retake Information: May not be retaken.
Lecture/Lab Hours: 3.0 lecture
Grades: Eligible Grades: A-F,WP,WF,WN,FN,AU,I
Learning Outcomes:
- Ability to assess and improve circuit testability.
- Ability to design digital logic for testability.
- Working knowledge of digital test process and diagnosis algorithms.
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